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@ -1,293 +0,0 @@
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From bdfdb325ed919c4e1f8e7e953c2a2bbc01957b27 Mon Sep 17 00:00:00 2001
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From: Kevin Holm <kevin@holm.dev>
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Date: Mon, 20 May 2024 16:37:01 +0800
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Subject: [PATCH] Cherry-picked fa57924c76d995 to apply to v6.10.2
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[Why] 4df96ba6676034 ("drm/amd/display: Add timing pixel encoding for mst
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mode validation") introduced a bug that caused some displays connected
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through a usb-c docking station to not show an image on some laptops.
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[How] Cherry-picked fa57924c76d995 ("drm/amd/display: Refactor function
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dm_dp_mst_is_port_support_mode()") from upstream.
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Link: https://lore.kernel.org/stable/fd8ece71459cd79f669efcfd25e4ce38b80d4164@holm.dev/T/#t
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Fixes: 4df96ba6676034 ("drm/amd/display: Add timing pixel encoding for mst mode validation")
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Original commit message:
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drm/amd/display: Refactor function dm_dp_mst_is_port_support_mode()
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[Why]
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dm_dp_mst_is_port_support_mode() is a bit not following the original design rule and cause
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light up issue with multiple 4k monitors after mst dsc hub.
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[How]
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Refactor function dm_dp_mst_is_port_support_mode() a bit to solve the light up issue.
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---
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.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 232 +++++++++++-------
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1 file changed, 147 insertions(+), 85 deletions(-)
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diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
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index a5e1a93ddaea..e90f9d697511 100644
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--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
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+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
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@@ -1595,109 +1595,171 @@ static bool is_dsc_common_config_possible(struct dc_stream_state *stream,
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return bw_range->max_target_bpp_x16 && bw_range->min_target_bpp_x16;
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}
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+#if defined(CONFIG_DRM_AMD_DC_FP)
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+static bool dp_get_link_current_set_bw(struct drm_dp_aux *aux, uint32_t *cur_link_bw)
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+{
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+ uint32_t total_data_bw_efficiency_x10000 = 0;
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+ uint32_t link_rate_per_lane_kbps = 0;
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+ enum dc_link_rate link_rate;
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+ union lane_count_set lane_count;
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+ u8 dp_link_encoding;
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+ u8 link_bw_set = 0;
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+
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+ *cur_link_bw = 0;
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+
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+ if (drm_dp_dpcd_read(aux, DP_MAIN_LINK_CHANNEL_CODING_SET, &dp_link_encoding, 1) != 1 ||
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+ drm_dp_dpcd_read(aux, DP_LANE_COUNT_SET, &lane_count.raw, 1) != 1 ||
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+ drm_dp_dpcd_read(aux, DP_LINK_BW_SET, &link_bw_set, 1) != 1)
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+ return false;
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+
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+ switch (dp_link_encoding) {
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+ case DP_8b_10b_ENCODING:
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+ link_rate = link_bw_set;
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+ link_rate_per_lane_kbps = link_rate * LINK_RATE_REF_FREQ_IN_KHZ * BITS_PER_DP_BYTE;
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+ total_data_bw_efficiency_x10000 = DATA_EFFICIENCY_8b_10b_x10000;
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+ total_data_bw_efficiency_x10000 /= 100;
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+ total_data_bw_efficiency_x10000 *= DATA_EFFICIENCY_8b_10b_FEC_EFFICIENCY_x100;
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+ break;
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+ case DP_128b_132b_ENCODING:
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+ switch (link_bw_set) {
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+ case DP_LINK_BW_10:
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+ link_rate = LINK_RATE_UHBR10;
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+ break;
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+ case DP_LINK_BW_13_5:
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+ link_rate = LINK_RATE_UHBR13_5;
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+ break;
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+ case DP_LINK_BW_20:
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+ link_rate = LINK_RATE_UHBR20;
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+ break;
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+ default:
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+ return false;
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+ }
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+
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+ link_rate_per_lane_kbps = link_rate * 10000;
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+ total_data_bw_efficiency_x10000 = DATA_EFFICIENCY_128b_132b_x10000;
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+ break;
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+ default:
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+ return false;
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+ }
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+
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+ *cur_link_bw = link_rate_per_lane_kbps * lane_count.bits.LANE_COUNT_SET / 10000 * total_data_bw_efficiency_x10000;
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+ return true;
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+}
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+#endif
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+
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enum dc_status dm_dp_mst_is_port_support_mode(
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struct amdgpu_dm_connector *aconnector,
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struct dc_stream_state *stream)
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{
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- int pbn, branch_max_throughput_mps = 0;
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+#if defined(CONFIG_DRM_AMD_DC_FP)
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+ int branch_max_throughput_mps = 0;
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struct dc_link_settings cur_link_settings;
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- unsigned int end_to_end_bw_in_kbps = 0;
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- unsigned int upper_link_bw_in_kbps = 0, down_link_bw_in_kbps = 0;
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+ uint32_t end_to_end_bw_in_kbps = 0;
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+ uint32_t root_link_bw_in_kbps = 0;
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+ uint32_t virtual_channel_bw_in_kbps = 0;
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struct dc_dsc_bw_range bw_range = {0};
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struct dc_dsc_config_options dsc_options = {0};
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+ uint32_t stream_kbps;
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- /*
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- * Consider the case with the depth of the mst topology tree is equal or less than 2
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- * A. When dsc bitstream can be transmitted along the entire path
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- * 1. dsc is possible between source and branch/leaf device (common dsc params is possible), AND
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- * 2. dsc passthrough supported at MST branch, or
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- * 3. dsc decoding supported at leaf MST device
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- * Use maximum dsc compression as bw constraint
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- * B. When dsc bitstream cannot be transmitted along the entire path
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- * Use native bw as bw constraint
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+ /* DSC unnecessary case
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+ * Check if timing could be supported within end-to-end BW
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*/
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- if (is_dsc_common_config_possible(stream, &bw_range) &&
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- (aconnector->mst_output_port->passthrough_aux ||
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- aconnector->dsc_aux == &aconnector->mst_output_port->aux)) {
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- cur_link_settings = stream->link->verified_link_cap;
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- upper_link_bw_in_kbps = dc_link_bandwidth_kbps(aconnector->dc_link, &cur_link_settings);
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- down_link_bw_in_kbps = kbps_from_pbn(aconnector->mst_output_port->full_pbn);
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-
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- /* pick the end to end bw bottleneck */
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- end_to_end_bw_in_kbps = min(upper_link_bw_in_kbps, down_link_bw_in_kbps);
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-
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- if (end_to_end_bw_in_kbps < bw_range.min_kbps) {
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- DRM_DEBUG_DRIVER("maximum dsc compression cannot fit into end-to-end bandwidth\n");
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+ stream_kbps =
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+ dc_bandwidth_in_kbps_from_timing(&stream->timing,
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+ dc_link_get_highest_encoding_format(stream->link));
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+ cur_link_settings = stream->link->verified_link_cap;
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+ root_link_bw_in_kbps = dc_link_bandwidth_kbps(aconnector->dc_link, &cur_link_settings);
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+ virtual_channel_bw_in_kbps = kbps_from_pbn(aconnector->mst_output_port->full_pbn);
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+
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+ /* pick the end to end bw bottleneck */
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+ end_to_end_bw_in_kbps = min(root_link_bw_in_kbps, virtual_channel_bw_in_kbps);
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+
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+ if (stream_kbps <= end_to_end_bw_in_kbps) {
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+ DRM_DEBUG_DRIVER("No DSC needed. End-to-end bw sufficient.");
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+ return DC_OK;
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+ }
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+
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+ /*DSC necessary case*/
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+ if (!aconnector->dsc_aux)
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+ return DC_FAIL_BANDWIDTH_VALIDATE;
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+
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+ if (is_dsc_common_config_possible(stream, &bw_range)) {
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+
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+ /*capable of dsc passthough. dsc bitstream along the entire path*/
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+ if (aconnector->mst_output_port->passthrough_aux) {
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+ if (bw_range.min_kbps > end_to_end_bw_in_kbps) {
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+ DRM_DEBUG_DRIVER("DSC passthrough. Max dsc compression can't fit into end-to-end bw\n");
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return DC_FAIL_BANDWIDTH_VALIDATE;
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- }
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+ }
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+ } else {
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+ /*dsc bitstream decoded at the dp last link*/
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+ struct drm_dp_mst_port *immediate_upstream_port = NULL;
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+ uint32_t end_link_bw = 0;
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+
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+ /*Get last DP link BW capability*/
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+ if (dp_get_link_current_set_bw(&aconnector->mst_output_port->aux, &end_link_bw)) {
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+ if (stream_kbps > end_link_bw) {
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+ DRM_DEBUG_DRIVER("DSC decode at last link. Mode required bw can't fit into available bw\n");
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+ return DC_FAIL_BANDWIDTH_VALIDATE;
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+ }
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+ }
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- if (end_to_end_bw_in_kbps < bw_range.stream_kbps) {
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- dc_dsc_get_default_config_option(stream->link->dc, &dsc_options);
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- dsc_options.max_target_bpp_limit_override_x16 = aconnector->base.display_info.max_dsc_bpp * 16;
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- if (dc_dsc_compute_config(stream->sink->ctx->dc->res_pool->dscs[0],
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- &stream->sink->dsc_caps.dsc_dec_caps,
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- &dsc_options,
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- end_to_end_bw_in_kbps,
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- &stream->timing,
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- dc_link_get_highest_encoding_format(stream->link),
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- &stream->timing.dsc_cfg)) {
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- stream->timing.flags.DSC = 1;
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- DRM_DEBUG_DRIVER("end-to-end bandwidth require dsc and dsc config found\n");
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- } else {
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- DRM_DEBUG_DRIVER("end-to-end bandwidth require dsc but dsc config not found\n");
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- return DC_FAIL_BANDWIDTH_VALIDATE;
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+ /*Get virtual channel bandwidth between source and the link before the last link*/
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+ if (aconnector->mst_output_port->parent->port_parent)
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+ immediate_upstream_port = aconnector->mst_output_port->parent->port_parent;
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+
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+ if (immediate_upstream_port) {
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+ virtual_channel_bw_in_kbps = kbps_from_pbn(immediate_upstream_port->full_pbn);
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+ virtual_channel_bw_in_kbps = min(root_link_bw_in_kbps, virtual_channel_bw_in_kbps);
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+ if (bw_range.min_kbps > virtual_channel_bw_in_kbps) {
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+ DRM_DEBUG_DRIVER("DSC decode at last link. Max dsc compression can't fit into MST available bw\n");
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+ return DC_FAIL_BANDWIDTH_VALIDATE;
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+ }
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}
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}
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- } else {
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- /* Check if mode could be supported within max slot
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- * number of current mst link and full_pbn of mst links.
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- */
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- int pbn_div, slot_num, max_slot_num;
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- enum dc_link_encoding_format link_encoding;
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- uint32_t stream_kbps =
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- dc_bandwidth_in_kbps_from_timing(&stream->timing,
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- dc_link_get_highest_encoding_format(stream->link));
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-
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- pbn = kbps_to_peak_pbn(stream_kbps);
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- pbn_div = dm_mst_get_pbn_divider(stream->link);
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- slot_num = DIV_ROUND_UP(pbn, pbn_div);
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-
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- link_encoding = dc_link_get_highest_encoding_format(stream->link);
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- if (link_encoding == DC_LINK_ENCODING_DP_8b_10b)
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- max_slot_num = 63;
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- else if (link_encoding == DC_LINK_ENCODING_DP_128b_132b)
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- max_slot_num = 64;
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- else {
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- DRM_DEBUG_DRIVER("Invalid link encoding format\n");
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- return DC_FAIL_BANDWIDTH_VALIDATE;
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- }
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- if (slot_num > max_slot_num ||
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- pbn > aconnector->mst_output_port->full_pbn) {
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- DRM_DEBUG_DRIVER("Mode can not be supported within mst links!");
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+ /*Confirm if we can obtain dsc config*/
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+ dc_dsc_get_default_config_option(stream->link->dc, &dsc_options);
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+ dsc_options.max_target_bpp_limit_override_x16 = aconnector->base.display_info.max_dsc_bpp * 16;
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+ if (dc_dsc_compute_config(stream->sink->ctx->dc->res_pool->dscs[0],
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+ &stream->sink->dsc_caps.dsc_dec_caps,
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+ &dsc_options,
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+ end_to_end_bw_in_kbps,
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+ &stream->timing,
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+ dc_link_get_highest_encoding_format(stream->link),
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+ &stream->timing.dsc_cfg)) {
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+ stream->timing.flags.DSC = 1;
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+ DRM_DEBUG_DRIVER("Require dsc and dsc config found\n");
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+ } else {
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+ DRM_DEBUG_DRIVER("Require dsc but can't find appropriate dsc config\n");
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return DC_FAIL_BANDWIDTH_VALIDATE;
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}
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- }
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- /* check is mst dsc output bandwidth branch_overall_throughput_0_mps */
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- switch (stream->timing.pixel_encoding) {
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- case PIXEL_ENCODING_RGB:
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- case PIXEL_ENCODING_YCBCR444:
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- branch_max_throughput_mps =
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- aconnector->dc_sink->dsc_caps.dsc_dec_caps.branch_overall_throughput_0_mps;
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- break;
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- case PIXEL_ENCODING_YCBCR422:
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- case PIXEL_ENCODING_YCBCR420:
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- branch_max_throughput_mps =
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- aconnector->dc_sink->dsc_caps.dsc_dec_caps.branch_overall_throughput_1_mps;
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- break;
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- default:
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- break;
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- }
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|
|
+ /* check is mst dsc output bandwidth branch_overall_throughput_0_mps */
|
|
|
|
|
+ switch (stream->timing.pixel_encoding) {
|
|
|
|
|
+ case PIXEL_ENCODING_RGB:
|
|
|
|
|
+ case PIXEL_ENCODING_YCBCR444:
|
|
|
|
|
+ branch_max_throughput_mps =
|
|
|
|
|
+ aconnector->dc_sink->dsc_caps.dsc_dec_caps.branch_overall_throughput_0_mps;
|
|
|
|
|
+ break;
|
|
|
|
|
+ case PIXEL_ENCODING_YCBCR422:
|
|
|
|
|
+ case PIXEL_ENCODING_YCBCR420:
|
|
|
|
|
+ branch_max_throughput_mps =
|
|
|
|
|
+ aconnector->dc_sink->dsc_caps.dsc_dec_caps.branch_overall_throughput_1_mps;
|
|
|
|
|
+ break;
|
|
|
|
|
+ default:
|
|
|
|
|
+ break;
|
|
|
|
|
+ }
|
|
|
|
|
|
|
|
|
|
- if (branch_max_throughput_mps != 0 &&
|
|
|
|
|
- ((stream->timing.pix_clk_100hz / 10) > branch_max_throughput_mps * 1000))
|
|
|
|
|
+ if (branch_max_throughput_mps != 0 &&
|
|
|
|
|
+ ((stream->timing.pix_clk_100hz / 10) > branch_max_throughput_mps * 1000)) {
|
|
|
|
|
+ DRM_DEBUG_DRIVER("DSC is required but max throughput mps fails");
|
|
|
|
|
return DC_FAIL_BANDWIDTH_VALIDATE;
|
|
|
|
|
-
|
|
|
|
|
+ }
|
|
|
|
|
+ } else {
|
|
|
|
|
+ DRM_DEBUG_DRIVER("DSC is required but can't find common dsc config.");
|
|
|
|
|
+ return DC_FAIL_BANDWIDTH_VALIDATE;
|
|
|
|
|
+ }
|
|
|
|
|
+#endif
|
|
|
|
|
return DC_OK;
|
|
|
|
|
}
|
|
|
|
|
--
|
|
|
|
|
2.45.2
|
|
|
|
|
|
usbpc